“This achievement of 40 percent will eventually industrialize itself in AI workflows, which require higher bandwidth and high efficiency,” Gambetta said.
The roadmap for sub-1 nanometer nodes
As a company that performs chip technology research, IBM does not manufacture commercial chips that could end up in AI data centers or consumer devices. Instead, IBM has partnered with semiconductor companies such as Rapidus in Japan to mass manufacture its previous generation of 2-nanometer node chips based on the nanosheet architecture, or to commercialize related technology in another partnership with Samsung in South Korea.
Other companies have followed up on IBM’s pioneering work without any direct collaboration. For example, Taiwan’s TSMC independently developed nanosheet transistors for its own proprietary 2-nanometer node technology.
“Nanosheet has become the foundation of the next generation of transistor scaling,” said Huiming Bu, vice president of IBM Semiconductors Global R&D and IBM Research, during the media briefing. “Today, nanosheet is adopted by all leading foundries for most of the 3-nanometer chips and all of the 2-nanometer chips.”
IBM declined to name specific companies that it may partner with to commercialize the newest sub-1-nanometer node technology. But Bu expects that commercial chips made at the sub-1-nanometer node and incorporating the newest nanostack architecture could begin production as early as in the next five years and most likely within a decade.
“It will replace nanosheet as today’s mainstream in leading foundries, whether it’s CPUs or GPUs,” Bu said. “Within a decade, this will become another mainstream that we have invented and helped industry to transform.”
